https://gcc.gnu.org/bugzilla/show_bug.cgi?id=94133
Bug ID: 94133
Summary: GCC loses track of SHIFT optimization
Product: gcc
Version: 9.2.1
Status: UNCONFIRMED
Keywords: missed-optimization
Severity: normal
Priority: P3
Component: middle-end
Assignee: unassigned at gcc dot gnu.org
Reporter: dje at gcc dot gnu.org
Target Milestone: ---
https://godbolt.org/z/pkXsfc
void foo1(unsigned sh, const uint64_t src[3], uint64_t dst[])
{
uint64_t w0 = src[0];
uint64_t w1 = src[1];
dst[0] = (uint64_t)(((((unsigned __int128)w1 << 64) | w0) << sh % 64) >> 64);
}
foo1:
mov rax, QWORD PTR [rsi+8]
mov r8, rdx
mov rdx, QWORD PTR [rsi]
mov ecx, edi
shld rax, rdx, cl
mov QWORD PTR [r8], rax
ret
void foo2(unsigned sh, const uint64_t src[3], uint64_t dst[])
{
uint64_t w0 = src[0];
uint64_t w1 = src[1];
uint64_t w2 = src[2];
dst[1] = (uint64_t)(((((unsigned __int128)w2 << 64) | w1) << sh % 64) >> 64);
dst[0] = (uint64_t)(((((unsigned __int128)w1 << 64) | w0) << sh % 64) >> 64);
}
foo2:
mov r9, QWORD PTR [rsi+8]
mov r8, rdx
mov ecx, edi
mov rdx, QWORD PTR [rsi+16]
and ecx, 63
mov r10, QWORD PTR [rsi]
mov rax, r9
shld rdx, r9, cl
sal rax, cl
test cl, 64
cmovne rdx, rax
mov rax, r10
sal rax, cl
mov QWORD PTR [r8+8], rdx
mov rdx, r9
shld rdx, r10, cl
test cl, 64
cmovne rdx, rax
mov QWORD PTR [r8], rdx
ret
