https://gcc.gnu.org/bugzilla/show_bug.cgi?id=90310
Martin Liška <marxin at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords|needs-bisection |
Status|UNCONFIRMED |NEW
Last reconfirmed| |2019-05-02
CC| |ebotcazou at gcc dot gnu.org
Ever confirmed|0 |1
--- Comment #2 from Martin Liška <marxin at gcc dot gnu.org> ---
To be honest, I can't see what you see with GCC 6. I've got:
bl __popcountsi2
ldr r3, .L6+16
str r0, [r3]
lsl r0, r4, #16
lsr r0, r0, #16
pop {r4, pc}
.L7:
while GCC 10 does:
bl __popcountsi2
ldr r3, .L6+16
str r0, [r3]
mov r0, r4 @ movhi
pop {r4, pc}
.L7:
Which is a change that started with r242326:
commit 1998c023a3ed6c59d8f1eea3a34528a9d6a93fe1 (refs/bisect/bad)
Author: ebotcazou <ebotcazou@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri Nov 11 22:38:33 2016 +0000
PR rtl-optimization/59461
* doc/rtl.texi (paradoxical subregs): Add missing word.
* combine.c (reg_nonzero_bits_for_combine): Do not discard results
in modes with precision larger than that of last_set_mode.
* rtlanal.c (nonzero_bits1) <SUBREG>: If WORD_REGISTER_OPERATIONS
is
set and LOAD_EXTEND_OP is appropriate, propagate results from inner
REGs to paradoxical SUBREGs.
(num_sign_bit_copies1) <SUBREG>: Likewise. Check that the mode is
not
larger than a word before invoking LOAD_EXTEND_OP on it.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@242326
138bc75d-0d04-0410-961f-82ee72b054a4
