[Bug target/88952] The asm operator modifiers for rs6000 should be documented like they are for x86

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88952

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Christopher Leonard from comment #5)
> Is the order at least consistant with x86-32? i.e. if you give a 64-bit
> input operand to inline assembly the order is hi:lo? I'm worried this is a
> bizarre convention imposed on high endian architectures.

Yes the order is always hi:lo (reg:reg+1) on all targets I know of; endianness
only matters when it comes to memory.