https://gcc.gnu.org/bugzilla/show_bug.cgi?id=83565
--- Comment #28 from Sergei Trofimovich <slyfox at inbox dot ru> --- Thanks all for very insightful comments and sorting out WORD_REGISTER_OPERATIONS ambiguity! I've understood quite a bit on how RTL does it's magic. I still have a few related questions to clarify things: 1. Is it directly visible for you from RTL dumps which bits GCC assumes as non-zero or you just know RTL invariants? I had to patch gcc locally to verify RTL prediction by adding printfs into print_pattern to get the idea how it works: insn_cost 4 for 20: [r347:DI]=<nz_bits(set)=0x800000>r354:DI#0 insn_cost 4 for 21: r357:SI=<nz_bits(set)=0x1>r343:SI<-<0x1 2. Does gcc have any validation mode that could have caught this error after code generation and checking against RTL invariant?
