[Bug target/80286] [5/6/7 Regression] AVX2 _mm_cvtsi128_si32 doesn't return a proper 32bits int

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80286

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Tue Apr  4 10:45:55 2017
New Revision: 246676

URL: https://gcc.gnu.org/viewcvs?rev=246676&root=gcc&view=rev
Log:
        PR target/80286
        * config/i386/i386.c (ix86_expand_args_builtin): If op has scalar
        int mode, convert_modes it to mode as unsigned, otherwise use
        lowpart_subreg to mode rather than SImode.
        * config/i386/sse.md (<mask_codefor>ashr<mode>3<mask_name>,
        ashr<mode>3, ashr<mode>3<mask_name>, <shift_insn><mode>3<mask_name>):
        Use DImode instead of SImode for the shift count operand.
        * config/i386/mmx.md (mmx_ashr<mode>3, mmx_<shift_insn><mode>3):
        Likewise.
testsuite/
        * gcc.target/i386/avx-pr80286.c: New test.
        * gcc.dg/pr80286.c: New test.

Added:
    trunk/gcc/testsuite/gcc.dg/pr80286.c
    trunk/gcc/testsuite/gcc.target/i386/avx-pr80286.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/config/i386/i386.c
    trunk/gcc/config/i386/mmx.md
    trunk/gcc/config/i386/sse.md
    trunk/gcc/testsuite/ChangeLog