https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80286
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I think this started with r198643, but the real bug isn't there, I'd say the
bug is in the shift patterns:
(define_insn "<shift_insn><mode>3<mask_name>"
[(set (match_operand:VI2_AVX2_AVX512BW 0 "register_operand" "=x,v")
(any_lshift:VI2_AVX2_AVX512BW
(match_operand:VI2_AVX2_AVX512BW 1 "register_operand" "0,v")
(match_operand:SI 2 "nonmemory_operand" "xN,vN")))]
"TARGET_SSE2 && <mask_mode512bit_condition> && <mask_avx512bw_condition>"
"@
p<vshift><ssemodesuffix>\t{%2, %0|%0, %2}
vp<vshift><ssemodesuffix>\t{%2, %1, %0<mask_operand3>|%0<mask_operand3>, %1,
%2}"
[(set_attr "isa" "noavx,avx")
(set_attr "type" "sseishft")
(set (attr "length_immediate")
(if_then_else (match_operand 2 "const_int_operand")
(const_string "1")
(const_string "0")))
(set_attr "prefix_data16" "1,*")
(set_attr "prefix" "orig,vex")
(set_attr "mode" "<sseinsnmode>")])
According to the AVX/AVX2 docs, the shift count is 64-bit, not 32-bit, so we
should probably use DImode instead of SImode for the 3rd operand.
I'll have a look on Monday.
