https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61633
--- Comment #1 from mshawcroft at gcc dot gnu.org --- Author: mshawcroft Date: Mon Jun 30 07:54:59 2014 New Revision: 212137 URL: https://gcc.gnu.org/viewcvs?rev=212137&root=gcc&view=rev Log: [AArch64] Fix register clobber in, aarch64_ashr_sisd_or_int_<mode>3 split. PR target/61633 The two split patterns associated with aarch64_ashr_sisd_or_int_<mode>3 split the instruction into a NEG followed by an SHL. The split uses one of the input operands as a scratch register to hold the output of the NEG resulting in register corruption. This patch adjusts the splits to use the output operand as the scratch register. 2014-06-30 Marcus Shawcroft <marcus.shawcr...@arm.com> PR target/61633 * config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3): Add alternative; make early clobber. Adjust both split patterns to use operand 0 as the working register. Modified: trunk/gcc/ChangeLog trunk/gcc/config/aarch64/aarch64.md
