http://gcc.gnu.org/bugzilla/show_bug.cgi?id=50182
--- Comment #9 from Oleg Smolsky <oleg.smolsky at gmail dot com> 2011-08-25 16:26:05 UTC --- AFAIK it's a production processor, a couple of years old. From x86info: Family: 6 Model: 15 Stepping: 4 Type: 0 Brand: 0 CPU Model: Core 2 Duo E6600 Original OEM Feature flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflsh ds acpi mmx fxsr sse sse2 ss ht tm pbe sse3 monitor ds-cpl vmx tm2 ssse3 cx16 xT PR Extended feature flags: SYSCALL xd em64t lahf_lm Cache info L1 Instruction cache: 32KB, 8-way associative. 64 byte line size. L1 Data cache: 32KB, 8-way associative. 64 byte line size. L3 unified cache: 4MB, 16-way associative. 64 byte line size. TLB info Instruction TLB: 4x 4MB page entries, or 8x 2MB pages entries, 4-way assoc.. Instruction TLB: 4K pages, 4-way associative, 128 entries. Data TLB: 4MB pages, 4-way associative, 32 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries Data TLB: 4K pages, 4-way associative, 256 entries. Data TLB: 4MB pages, 4-way associative, 32 entries 64 byte prefetching. L0 Data TLB: 4MB pages, 4-way set associative, 16 entries L0 Data TLB: 4MB pages, 4-way set associative, 16 entries Data TLB: 4K pages, 4-way associative, 256 entries. The physical package supports 4 logical processors
