On 28.11.2024 11:25 AM, Neil Armstrong wrote:
> The Adreno GPU Management Unit (GMU) can also scale DDR Bandwidth along
> the Frequency and Power Domain level, but by default we leave the
> OPP core scale the interconnect ddr path.
>
> While scaling via the interconnect path was sufficient, newer GPUs
> like the A750 requires specific vote paremeters and bandwidth to
> achieve full functionality.
>
> In order to calculate vote values used by the GPU Management
> Unit (GMU), we need to parse all the possible OPP Bandwidths and
> create a vote value to be sent to the appropriate Bus Control
> Modules (BCMs) declared in the GPU info struct.
>
> This vote value is called IB, while on the othe side the GMU also
> takes another vote called AB which is a 16bit quantized value
> of the bandwidth against the maximum supported bandwidth.
>
> The vote array will then be used to dynamically generate the GMU
> bw_table sent during the GMU power-up.
>
> Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org>
> ---
> drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 174
> ++++++++++++++++++++++++++++++++++
> drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 14 +++
> drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
> drivers/gpu/drm/msm/adreno/a6xx_hfi.h | 5 +
> 4 files changed, 194 insertions(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> index
> 14db7376c712d19446b38152e480bd5a1e0a5198..ee2010a01186721dd377f1655fcf05ddaff77131
> 100644
> --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c
> @@ -9,6 +9,7 @@
> #include <linux/pm_domain.h>
> #include <linux/pm_opp.h>
> #include <soc/qcom/cmd-db.h>
> +#include <soc/qcom/tcs.h>
> #include <drm/drm_gem.h>
>
> #include "a6xx_gpu.h"
> @@ -1287,6 +1288,131 @@ static int a6xx_gmu_memory_probe(struct a6xx_gmu *gmu)
> return 0;
> }
>
> +/**
> + * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
> + * @unit: divisor used to convert bytes/sec bw value to an RPMh msg
> + * @width: multiplier used to convert bytes/sec bw value to an RPMh msg
> + * @vcd: virtual clock domain that this bcm belongs to
> + * @reserved: reserved field
> + */
> +struct bcm_db {
> + __le32 unit;
> + __le16 width;
> + u8 vcd;
> + u8 reserved;
> +};
> +
> +static u64 bcm_div(u64 num, u32 base)
> +{
> + /* Ensure that small votes aren't lost. */
> + if (num && num < base)
> + return 1;
> +
> + do_div(num, base);
> +
> + return num;
> +}
This should live in include/soc/qcom/bcm.h, similarly to tcs.h in
that directory
> +static int a6xx_gmu_rpmh_bw_votes_init(const struct a6xx_info *info,
> + struct a6xx_gmu *gmu)
> +{
> + const struct bcm_db *bcm_data[GMU_MAX_BCMS] = { 0 };
> + unsigned int bcm_index, bw_index, bcm_count = 0;
> +
> + if (!info->bcms)
> + return 0;
> +
> + /* Retrieve BCM data from cmd-db */
> + for (bcm_index = 0; bcm_index < GMU_MAX_BCMS; bcm_index++) {
> + size_t count;
> +
> + /* Stop at first unconfigured bcm */
> + if (!info->bcms[bcm_index].name)
> + break;
> +
> + bcm_data[bcm_index] = cmd_db_read_aux_data(
> + info->bcms[bcm_index].name,
> + &count);
> + if (IS_ERR(bcm_data[bcm_index]))
> + return PTR_ERR(bcm_data[bcm_index]);
> +
> + if (!count)
> + return -EINVAL;
> +
> + ++bcm_count;
> + }
> +
> + /* Generate BCM votes values for each bandwidth & BCM */
> + for (bw_index = 0; bw_index < gmu->nr_gpu_bws; bw_index++) {
> + u32 *data = gmu->gpu_ib_votes[bw_index];
> + u32 bw = gmu->gpu_bw_table[bw_index];
> +
> + /* Calculations loosely copied from bcm_aggregate() &
> tcs_cmd_gen() */
Ditto, perhaps this should be exported from icc
[...]
Konrad
