[PATCH v3 6/7] arm64: qcom: dts: sm8550: add interconnect and opp-peak-kBps for GPU

[Neil Armstrong]

Each GPU OPP requires a specific peak DDR bandwidth, let's add
those to each OPP and also the related interconnect path.

Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org>
---
 arch/arm64/boot/dts/qcom/sm8550.dtsi | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi 
b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 
e7774d32fb6d2288748ecec00bf525b2b3c40fbb..545eb52174c704bbefa69189fad9fbff053d8569
 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -2114,6 +2114,9 @@ gpu: gpu@3d00000 {
                        qcom,gmu = <&gmu>;
                        #cooling-cells = <2>;
 
+                       interconnects = <&gem_noc MASTER_GFX3D 0 &mc_virt 
SLAVE_EBI1 0>;
+                       interconnect-names = "gfx-mem";
+
                        status = "disabled";
 
                        zap-shader {
@@ -2127,41 +2130,49 @@ gpu_opp_table: opp-table {
                                opp-680000000 {
                                        opp-hz = /bits/ 64 <680000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_SVS_L1>;
+                                       opp-peak-kBps = <16500000>;
                                };
 
                                opp-615000000 {
                                        opp-hz = /bits/ 64 <615000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_SVS_L0>;
+                                       opp-peak-kBps = <16500000>;
                                };
 
                                opp-550000000 {
                                        opp-hz = /bits/ 64 <550000000>;
                                        opp-level = <RPMH_REGULATOR_LEVEL_SVS>;
+                                       opp-peak-kBps = <12449218>;
                                };
 
                                opp-475000000 {
                                        opp-hz = /bits/ 64 <475000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
+                                       opp-peak-kBps = <8171875>;
                                };
 
                                opp-401000000 {
                                        opp-hz = /bits/ 64 <401000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_LOW_SVS>;
+                                       opp-peak-kBps = <6671875>;
                                };
 
                                opp-348000000 {
                                        opp-hz = /bits/ 64 <348000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
+                                       opp-peak-kBps = <6074218>;
                                };
 
                                opp-295000000 {
                                        opp-hz = /bits/ 64 <295000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
+                                       opp-peak-kBps = <6074218>;
                                };
 
                                opp-220000000 {
                                        opp-hz = /bits/ 64 <220000000>;
                                        opp-level = 
<RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
+                                       opp-peak-kBps = <6074218>;
                                };
                        };
                };

-- 
2.34.1