On at 2022-07-07 09:39 -0700, Ralf Quint wrote:
Similar with NASM, where for some weird reasons, they made the assembler
case-sensitive, which I would consider utter nonsense (also among my
griefs with C(++)). And it really bites you if you are trying to link
assembler modules with other programming languages. It also
(deliberately) doesn't support some assembler instructions (as per Intel
specs) just because it doesn't fit into their parser (LODS, MOVS, ...),
Fair enough on all the other points, but the support for string
instructions is actually there. It just isn't done with explicit
operands to the instruction to indicate the operand size and segment
override (whereas I believe the symbol offset address you can specify to
MASM is ignored). Instead, NASM supports eg lodsb / lodsw / lodsd, as
well as segment override and a16 or a32 as prefixes. So for example you
could have "a32 es lodsd". This syntax used to be documented in their
instruction set reference, as forked by me. [1]
On the ignored address, the Intel manual according to felixcloutier.com
[2] says:
===
At the assembly-code level, two forms of this instruction are allowed:
the “explicit-operands” form and the “no-operands” form. The
explicit-operands form (specified with the LODS mnemonic) allows the
source operand to be specified explicitly. Here, the source operand
should be a symbol that indicates the size and location of the source
value. The destination operand is then automatically selected to match
the size of the source operand (the AL register for byte operands, AX
for word operands, and EAX for doubleword operands). This
explicit-operands form is provided to allow documentation; however, note
that the documentation provided by this form can be misleading. That is,
the source operand symbol must specify the correct type (size) of the
operand (byte, word, or doubleword), but it does not have to specify the
correct location. The location is always specified by the DS:(E)SI
registers, which must be loaded correctly before the load string
instruction is executed.
===
Regards,
ecm
[1]: https://pushbx.org/ecm/doc/insref.htm#insLODSB
[2]: https://www.felixcloutier.com/x86/lods:lodsb:lodsw:lodsd:lodsq
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