Well, the question is rather simple... i am running some experiments
on system with severe load on the PCI bus (basically a router with 4 interfaces
trying to forward 2..4 streams of 64-byte packets at 100Mbit/s (i.e. 144kpps
on each stream), and from low level timing i notice that the
time to access a status register in the card sometimes goes up in the
sky (I have measured well over 10us under heavy load, whereas the
normal time is in the order of 0.5-1us).
10us is a fairly long time, and while i can explain it easily (there
are 4 active cards in the system, each one with a transmit, receive
and control engines trying to access the PCI bus -- and there are
two bridges between the CPU and the card), i wonder if the CPU can
potentially wait forever to get hold of the bus, or it eventually
times out. If so, how can i tell that the operation failed ?
cheers
luigi
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Luigi RIZZO, [EMAIL PROTECTED] . ACIRI/ICSI (on leave from Univ. di Pisa)
http://www.iet.unipi.it/~luigi/ . 1947 Center St, Berkeley CA 94704
Phone: (510) 666 2927
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