Re: followup to apm problems.

[Warner Losh]

In message <[EMAIL PROTECTED]> Garrett
Wollman writes: 
: And designs based on the Intel PIIX4 will generate SMI# interrupts for
: whichever activities are programmed in the BIOS, completely bypassing
: the traditional interrupt mechanism.

So does that mean if we do disable them at the PIC level we'll be OK?

Warner


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