On Tue, 2005-08-16 at 18:01 +0200, Jonas Maebe wrote: > On 16 aug 2005, at 17:54, Jonas Maebe wrote: > > > wer and PowerPC have been sort of merged quite a while ago already > > and use the same instruction set now (at least from a non-OS > > developer point-of-view). But it's indeed quite probable that the > > cache line size on a Power5 is larger than 32 bytes (the G5 was > > derived from the Power4). > > Power5 has mixed 128 (L2) 256 (L3) byte cache lines (slide 18): > http://www.cs.utexas.edu/users/cart/arch/fall03/KallaSlides.pdf > > Not sure how this works with dcbz, but most definitely not in a way > it's used in the RTL.
Attached patch fixes the segfault. It's very ugly, so don't commit it! I did use it on Fedora though. Tom tested it on POWER5, which worked. I don't know how this problem could be solved for good. Maybe someone can rewrite the Move and Fillchar procedures? Those were the only one affected... Btw: maybe something to put on the website? That fpc now also works on POWER5? (After it's fixed, offcourse) Joost. _______________________________________________ fpc-devel maillist - [email protected] http://lists.freepascal.org/mailman/listinfo/fpc-devel
