On Wed, 6 Oct 2021, Segher Boessenkool wrote: > With "not in any" I mean: not for other architectures either! All archs > that do not say anything about floating point in their machine > description get a working sofware floating point (for binary32 and > binary64 currently).
Any architecture that supports a software floating-point ABI (i.e. one that does argument passing and return for floating-point in integer registers) should specify it in its ABI documents. For example, https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-cc.adoc describes both "Integer Calling Convention" and "Hardware Floating-point Calling Convention", with a series of named ABIs based on those such as LP64, LP64F, etc. (like on (32-bit) Arm, but unlike Power or MIPS, RISC-V GCC also supports building programs that use hardware floating-point instructions but the software floating-point ABI). That's how the (unified) 32-bit powerpc ABI documents things: both hardware and software floating-point ABI variants. If the architecture doesn't support hardware floating point, or doesn't have separate registers for it, the software floating-point ABI is just "the ABI" and there's no separate hardware floating-point ABI, of course. -- Joseph S. Myers jos...@codesourcery.com
