On 10/11/13 09:02 , andy pugh wrote:
> On the HAL side it looks moderately straightforward, a third interface
> driver to live alongside hm2_pci, hm2_7i43 and hm2_eth (arguably
> hm2_7i43 should have been called hm2_epp).

The hm2_7i43 driver has the right name, because it has a bunch of 
7i43-specific stuff in it.  There's another EPP AnyIO board now called 
the 7i90, and it needs a different driver than hm2_7i43 because it needs 
to be talked to in a different way, and unlike all the PCI AnyIO cards 
there's no way to tell the difference between them 7i43 and the 7i90.

What would probably make sense is to pull the EPP code out of hm2_7i43, 
and while we're at it look at what other EPP-using drivers there are, 
and unify all that.  Then hm2_7i43 and hm2_7i90 (and the others) can use 
this new EPP driver.

And *then*, we can make that EPP driver pluggable so we can drop a 
BBB/PRU EPP driver in, and have it export the same interface to the 
higher-level drivers, and then both 7i43 and 7i90, and whatever other 
EPP-using drivers we have, would work.


> hm2_bbb could even conceivably be a base-thread HAL module and simply
> twiddle GPIO bits.

That'd be too slow for hm2 EPP communication.  The EPP protocol needs 
several control-line twiddles, and polling for incoming signals from the 
device at the other end of the cable, per byte transfered:

http://www.fapo.com/eppmode.htm


> However, if it were to be presented as a parallel port (as far as
> LinuxCNC saw it) instead then it would also work with the Pico cards.

We could provide compatibility either at the IO port level, or at the 
API level as i outlined above.  I think either one could be made to work.


-- 
Sebastian Kuzminsky

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