On Sat, 26 Nov 2011, gene heskett wrote:
Date: Sat, 26 Nov 2011 10:05:14 -0500
From: gene heskett <[email protected]>
Reply-To: "Enhanced Machine Controller (EMC)"
<[email protected]>
To: [email protected]
Subject: Re: [Emc-users] PID & BLDC
On Saturday, November 26, 2011 10:01:43 AM Viesturs L??cis did opine:
2011/11/26 gene heskett <[email protected]>:
> It is a firmware problem. The board contains a 200k gate device, but
> the firmware says its for a 400k gate device.
I had this problem 3 months ago and then it disappeared until yesterday.
So are You telling that I had 200K card working with 400K firmware?
No, but the kernel log you posted said the card was a 200k card but the
firmware it tried to load was for a 400k card. Go back and look at the
link you posted, the error was pretty clear.
Before the 7I43 is configured is has only a small CPLD for the EPP
handshaking and FPGA programming control. This CPLD only connects to one
parallel port data bit. This allows a very minimal 2 input bits and 2
output bits but this is sufficient to load the FPGA. The 200K indication
just means that after trying to read one of these bits the host computer got a
0 bit. Many hardware problems can mimic this.
When Viesters first had this problem months ago ISTR that if driver debugging
was turned on, the EPP port simply read as all 0's which would cause the 200K
warning.
BTW it is not working with 200K firmware. I tried it just now.
Post that snippet of the load attempt please.
Viesturs
Cheers, Gene
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All the data continuously generated in your IT infrastructure
contains a definitive record of customers, application performance,
security threats, fraudulent activity, and more. Splunk takes this
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