Dave Engvall wrote: > <snip> > since I didn't find Jon's post on the interrupt process. > > > Some reading of pdp wiki, etc refreshes memory (slowly). > > There were 4 interrupt lines which gave only 4 levels of interrupt. > Then interrupts were further arbitrated by the position of the > interrupting board on the bus. > > This is only the interrupt priority LEVELS. There were 4 priority chains for asking for an interrupt. But, the full address/data bus (on Q-bus) was available for the vector. (Various CPUs would accept so many bits as the vector address.)
Jon ------------------------------------------------------------------------------ _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
