On Fri, Oct 04, 2013 at 09:31:49AM +0100, David Laight wrote: > > Mmmm.. I am not sure I am getting it. Could you please rephrase? > > One possibility is for drivers than can use a lot of interrupts to > request a minimum number initially and then request the additional > ones much later on. > That would make it less likely that none will be available for > devices/drivers that need them but are initialised later.
It sounds as a whole new topic for me. Isn't it? Anyway, what prevents the above from being done with pci_enable_msix(nvec1) - pci_disable_msix() - pci_enable_msix(nvec2) where nvec1 < nvec2? > David -- Regards, Alexander Gordeev [email protected] ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
