On Wed 2019-06-19 17:46:48, Lukas Schneider wrote: > This patch fixes the issue reported by checkpatch: > > CHECK: usleep_range is preferred over udelay; > see Doucmentation/timers/timers-howto.txt > > It's save to sleep here instead of using busy waiting, > because we are not in an atomic context.
Is it good idea? How can the system really sleep for 50 usec?
Pavel
> @@ -865,7 +865,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8
> sample_point, u8 tune_dir)
> PHASE_CHANGE);
> if (retval)
> return retval;
> - udelay(50);
> + usleep_range(50, 60);
> retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
> PHASE_CHANGE |
> PHASE_NOT_RESET |
> @@ -877,14 +877,14 @@ static int sd_change_phase(struct rtsx_chip *chip, u8
> sample_point, u8 tune_dir)
> CHANGE_CLK, CHANGE_CLK);
> if (retval)
> return retval;
> - udelay(50);
> + usleep_range(50, 60);
> retval = rtsx_write_register(chip, SD_VP_CTL, 0xFF,
> PHASE_NOT_RESET |
> sample_point);
> if (retval)
> return retval;
> }
> - udelay(100);
> + usleep_range(100, 110);
>
> rtsx_init_cmd(chip);
> rtsx_add_cmd(chip, WRITE_REG_CMD, SD_DCMPS_CTL, DCMPS_CHANGE,
> @@ -918,7 +918,7 @@ static int sd_change_phase(struct rtsx_chip *chip, u8
> sample_point, u8 tune_dir)
> return retval;
> }
>
> - udelay(50);
> + usleep_range(50, 60);
> }
>
> retval = rtsx_write_register(chip, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0);
> @@ -1416,7 +1416,7 @@ static int sd_wait_data_idle(struct rtsx_chip *chip)
> retval = STATUS_SUCCESS;
> break;
> }
> - udelay(100);
> + usleep_range(100, 110);
> }
> dev_dbg(rtsx_dev(chip), "SD_DATA_STATE: 0x%02x\n", val);
>
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures)
http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
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