On Mon, Mar 30, 2026 at 09:36:56AM +0530, Ankit Nautiyal wrote:
> Currently AS SDP is only configured when VRR is enabled. However, other
> use cases like CMRR, Panel Replay, etc. also send information to the sink
> via AS SDPs.
>
> With optimized guardband, we also need to account for wakeup time and other
> relevant details that depend on the AS SDP position whenever AS SDP is
> enabled. If a feature enabling AS SDP gets turned on later (after modeset),
> the guardband might not be sufficient and may need to increase, triggering
> a full modeset.
>
> To avoid this, always send AS SDP whenever the source and sink both
> support it.
>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 7da3dee226a0..81be0767927e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3136,7 +3136,7 @@ static bool intel_dp_can_use_as_sdp(struct intel_dp
> *intel_dp,
> if (drm_dp_is_branch(intel_dp->dpcd))
> return false;
>
> - return crtc_state->vrr.enable;
> + return true;
I think what we actually want is something like
...
if (pr_auxless_alpm &&
DP_PANEL_REPLAY_ASYNC_VIDEO_TIMING_NOT_SUPPORTED_IN_PR)
return true;
return intel_vrr_possible();
}
That way non-VRR PR panels that don't need the AS SDP to maintain
the synchronization can avoid the AS SDP, and thus potentially use
a smaller guardband.
> }
>
> static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
> --
> 2.45.2
--
Ville Syrjälä
Intel
