On 2026-02-24 22:53, Joel Fernandes wrote: > Add the page table walker implementation that traverses the page table > hierarchy for both MMU v2 (5-level) and MMU v3 (6-level) to resolve > virtual addresses to physical addresses or find PTE locations. > > Currently only v2 has been tested (nova-core currently boots pre-hopper) > with some initial prepatory work done for v3. > > Cc: Nikola Djukic <[email protected]> > Signed-off-by: Joel Fernandes <[email protected]> > --- > drivers/gpu/nova-core/mm/pagetable.rs | 1 + > drivers/gpu/nova-core/mm/pagetable/walk.rs | 218 +++++++++++++++++++++ > 2 files changed, 219 insertions(+) > create mode 100644 drivers/gpu/nova-core/mm/pagetable/walk.rs > > diff --git a/drivers/gpu/nova-core/mm/pagetable.rs > b/drivers/gpu/nova-core/mm/pagetable.rs > index 33acb7053fbe..7ebea4cb8437 100644 > --- a/drivers/gpu/nova-core/mm/pagetable.rs > +++ b/drivers/gpu/nova-core/mm/pagetable.rs > @@ -9,6 +9,7 @@ > #![expect(dead_code)] > pub(crate) mod ver2; > pub(crate) mod ver3; > +pub(crate) mod walk; > > use kernel::prelude::*; > > diff --git a/drivers/gpu/nova-core/mm/pagetable/walk.rs > b/drivers/gpu/nova-core/mm/pagetable/walk.rs > new file mode 100644 > index 000000000000..023226af8816 > --- /dev/null > +++ b/drivers/gpu/nova-core/mm/pagetable/walk.rs > @@ -0,0 +1,218 @@ > +// SPDX-License-Identifier: GPL-2.0 > + > +//! Page table walker implementation for NVIDIA GPUs. > +//! > +//! This module provides page table walking functionality for MMU v2 and v3. > +//! The walker traverses the page table hierarchy to resolve virtual > addresses > +//! to physical addresses or to find PTE locations. > +//! > +//! # Page Table Hierarchy > +//! > +//! ## MMU v2 (Turing/Ampere/Ada) - 5 levels > +//! > +//! ```text > +//! +-------+ +-------+ +-------+ +---------+ +-------+ > +//! | PDB |---->| L1 |---->| L2 |---->| L3 Dual |---->| L4 | > +//! | (L0) | | | | | | PDE | | (PTE) | > +//! +-------+ +-------+ +-------+ +---------+ +-------+ > +//! 64-bit 64-bit 64-bit 128-bit 64-bit > +//! PDE PDE PDE (big+small) PTE > +//! ``` > +//! > +//! ## MMU v3 (Hopper+) - 6 levels
I think this is called "4 levels" and "5 levels" in kernel MM rather than "5 levels" and "6 levels". Best, Gary > +//! > +//! ```text > +//! +-------+ +-------+ +-------+ +-------+ +---------+ > +-------+ > +//! | PDB |---->| L1 |---->| L2 |---->| L3 |---->| L4 Dual > |---->| L5 | > +//! | (L0) | | | | | | | | PDE | > | (PTE) | > +//! +-------+ +-------+ +-------+ +-------+ +---------+ > +-------+ > +//! 64-bit 64-bit 64-bit 64-bit 128-bit > 64-bit > +//! PDE PDE PDE PDE (big+small) > PTE > +//! ``` > +//! > +//! # Result of a page table walk > +//! > +//! The walker returns a [`WalkResult`] indicating the outcome.
