On Mon, 24 Nov 2025 at 14:10, Chris Brandt <[email protected]> wrote:
> Convert the limited MIPI clock calculations to a full range of settings
> based on math including H/W limitation validation.
> Since the required DSI division setting must be specified from external
> sources before calculations, expose a new API to set it.
>
> Signed-off-by: Chris Brandt <[email protected]>
> Reviewed-by: Biju Das <[email protected]>
> Tested-by: Biju Das <[email protected]>

> --- a/drivers/clk/renesas/rzg2l-cpg.c
> +++ b/drivers/clk/renesas/rzg2l-cpg.c

> @@ -556,17 +579,114 @@ rzg2l_cpg_sd_mux_clk_register(const struct 
> cpg_core_clk *core,
>         return clk_hw->clk;
>  }
>
> +/*
> + * VCO-->[POSTDIV1,2]--FOUTPOSTDIV--------------->|
> + *                          |                     |-->[1/(DSI DIV A * B)]--> 
> MIPI_DSI_VCLK
> + *                          |-->[1/2]--FOUT1PH0-->|
> + *                          |
> + *                          |------->[1/16]--------------------------------> 
> hsclk (MIPI-PHY)
> + */
>  static unsigned long
> -rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_pll5_param *params,
> +rzg2l_cpg_get_foutpostdiv_rate(struct rzg2l_cpg_priv *priv,
> +                              struct rzg2l_pll5_param *params,
>                                unsigned long rate)
>  {
> -       unsigned long foutpostdiv_rate, foutvco_rate;
> +       const u32 extal_hz = EXTAL_FREQ_IN_MEGA_HZ * MEGA;
> +       unsigned long foutpostdiv_rate;
> +       unsigned int a, b, odd;
> +       unsigned long hsclk;
> +       u8 dsi_div_ab_calc;
> +       u64 foutvco_rate;

As foutvco_rate is changed to u64...

> +clk_valid:
>         params->pl5_spread = 0x16;
>
>         foutvco_rate = div_u64(mul_u32_u32(EXTAL_FREQ_IN_MEGA_HZ * MEGA,
                                             (params->pl5_intin << 24)
+ params->pl5_fracin),
                                 params->pl5_refdiv) >> 24;
          foutpostdiv_rate = DIV_ROUND_CLOSEST(foutvco_rate,
                                               params->pl5_postdiv1 *
params->pl5_postdiv2);

... this division needs to be updated to DIV_U64_ROUND_CLOSEST,
to fix build failures on 32-bit, as reported by the kernel test robot.
I will fold in the fix.

          return foutpostdiv_rate;

   }

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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