Our implementation for BAR2 (lmembar) resize works at the xe_vram layer and only releases that BAR before resizing. That is not always sufficient. If the parent bridge needs to move, the BAR0 also needs to be released, otherwise the resize fails. This is the case of not having enough space allocated from the beginning.
Also, there's a BAR0 in the upstream port of the pcie switch in BMG preventing the resize to propagate to the bridge as previously discussed at https://lore.kernel.org/intel-xe/20250721173057.867829-1-...@icenowy.me/ and https://lore.kernel.org/intel-xe/wqukxnxni2dbpdhri3cbvlrzsefgdanesgskzmxi5sauvsirsl@xor663jw2cdw I'm bringing that commit from Ilpo here so this can be tested with the xe changes and go to stable (first 2 patches). The third patch is just code move as all the logic is in a different layer now. That could wait longer though as there are other refactors coming through the PCI tree and that would conflict (see second link above). With this I could resize the lmembar on some problematic hosts and after doing an SBR, with one caveat: the audio device also prevents the BAR from moving and it needs to be manually removed before resizing. With the PCI refactors and BAR fitting logic that Ilpo is working on, it's expected that it won't be needed for a long time. Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com> --- Ilpo Järvinen (1): PCI: Release BAR0 of an integrated bridge to allow GPU BAR resize Lucas De Marchi (2): drm/xe: Move rebar to be done earlier drm/xe: Move rebar to its own file drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_pci.c | 3 + drivers/gpu/drm/xe/xe_pci_rebar.c | 125 ++++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_pci_rebar.h | 13 ++++ drivers/gpu/drm/xe/xe_vram.c | 103 ------------------------------- drivers/pci/quirks.c | 20 ++++++ 6 files changed, 162 insertions(+), 103 deletions(-) base-commit: 95bc43e85f952ef4ebfff1406883e1e07a7daeda change-id: 20250917-xe-pci-rebar-2-c0fe2f04c879 Lucas De Marchi
