Hi Hari,
On 04/09/25 03:33, Rob Herring wrote:
On Wed, Sep 03, 2025 at 04:43:57PM +0530, Harikrishna Shenoy wrote:
From: Swapnil Jakhade <sjakh...@cadence.com>
Add binding changes for DSC(Display Stream Compression) in the MHDP8546
DPI/DP bridge.
Signed-off-by: Swapnil Jakhade <sjakh...@cadence.com>
Signed-off-by: Harikrishna Shenoy <h-she...@ti.com>
---
.../bindings/display/bridge/cdns,mhdp8546.yaml | 11 +++++++----
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
index c2b369456e4e..6e749c002669 100644
--- a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
+++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml
@@ -27,6 +27,8 @@ properties:
Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7
SoCs.
- description:
Register block of mhdptx sapb registers.
+ - description:
+ Register block for mhdptx DSC encoder registers.
reg-names:
minItems: 1
@@ -34,6 +36,7 @@ properties:
- const: mhdptx
- const: j721e-intg
- const: mhdptx-sapb
+ - const: mhdptx-dsc
'mhdptx' is redundant. Don't continue that pattern. Just 'dsc'.
clocks:
maxItems: 1
@@ -100,18 +103,18 @@ allOf:
properties:
reg:
minItems: 2
- maxItems: 3
+ maxItems: 4
reg-names:
minItems: 2
- maxItems: 3
+ maxItems: 4
else:
properties:
reg:
minItems: 1
- maxItems: 2
+ maxItems: 3
reg-names:
minItems: 1
- maxItems: 2
+ maxItems: 3
Have you tested this works? While it might work for TI with the
j721e-intg registers in the middle, it won't work for platforms without
them. You're going to have to have 2 lists of reg-names.
Yes, as discussed offline you probably need an if else for reg blocks
too here i.e. one for generic cadence compatible which would have
cadence specific blocks common for all SoCs and other for j721e specific
compatible which would have j721e specific reg blocks.
Regards
Devarsh
Rob
