Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
with a set of changes required for that.
---
Changes in v2:
- vi_sensor gated through csus
- TEGRA30_CLK_CLK_MAX moved to clk-tegra30
- adjusted commit titles and messages
- clk_register_clkdev dropped from pad clock registration
- removed tegra30-vi/vip and used tegra20 fallback
- added separate csi schema for tegra20-csi and tegra30-csi
- fixet number of VI channels
- adjusted tegra_vi_out naming
- fixed yuv_input_format to main_input_format
- MIPI calibration refsctored for Tegra114+ and added support for
pre-Tegra114 to use CSI as a MIPI calibration device
- switched ENOMEM to EBUSY
- added check into tegra_channel_get_remote_csi_subdev
- moved avdd-dsi-csi-supply into CSI
- next_fs_sp_idx > next_fs_sp_value
- removed host1x_syncpt_incr from framecounted syncpoint
- csi subdev request moved before frame cycle
---
Svyatoslav Ryhel (23):
clk: tegra: set CSUS as vi_sensors gate for Tegra20, Tegra30 and
Tegra114
dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
clk: tegra30: add CSI pad clock gates
dt-bindings: display: tegra: document Tegra30 VI and VIP
staging: media: tegra-video: expand VI and VIP support to Tegra30
staging: media: tegra-video: vi: adjust get_selection op check
staging: media: tegra-video: vi: add flip controls only if no source
controls are provided
staging: media: tegra-video: csi: move CSI helpers to header
gpu: host1x: convert MIPI to use operations
staging: media: tegra-video: csi: add support for SoCs with integrated
MIPI calibration
staging: media: tegra-video: csi: add a check to
tegra_channel_get_remote_csi_subdev
dt-bindings: display: tegra: move avdd-dsi-csi-supply from VI to CSI
staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
CSI
staging: media: tegra-video: tegra20: set correct maximum width and
height
staging: media: tegra-video: tegra20: add support for second output of
VI
staging: media: tegra-video: tegra20: simplify format align
calculations
staging: media: tegra-video: tegra20: set VI HW revision
staging: media: tegra-video: tegra20: increase maximum VI clock
frequency
staging: media: tegra-video: tegra20: expand format support with
RAW8/10 and YUV422 1X16
staging: media: tegra-video: tegra20: adjust luma buffer stride
dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
ARM: tegra: add CSI nodes for Tegra20 and Tegra30
staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
.../display/tegra/nvidia,tegra20-csi.yaml | 104 +++
.../display/tegra/nvidia,tegra20-vi.yaml | 22 +-
.../display/tegra/nvidia,tegra20-vip.yaml | 9 +-
.../display/tegra/nvidia,tegra210-csi.yaml | 3 +
.../display/tegra/nvidia,tegra30-csi.yaml | 115 +++
arch/arm/boot/dts/nvidia/tegra20.dtsi | 19 +-
arch/arm/boot/dts/nvidia/tegra30.dtsi | 24 +-
drivers/clk/tegra/clk-tegra114.c | 7 +-
drivers/clk/tegra/clk-tegra20.c | 7 +-
drivers/clk/tegra/clk-tegra30.c | 21 +-
drivers/gpu/drm/tegra/dsi.c | 1 +
drivers/gpu/host1x/mipi.c | 58 +-
drivers/staging/media/tegra-video/Makefile | 1 +
drivers/staging/media/tegra-video/csi.c | 66 +-
drivers/staging/media/tegra-video/tegra20.c | 793 +++++++++++++++---
drivers/staging/media/tegra-video/tegra210.c | 2 +-
drivers/staging/media/tegra-video/vi.c | 54 +-
drivers/staging/media/tegra-video/vi.h | 9 +-
drivers/staging/media/tegra-video/video.c | 8 +-
drivers/staging/media/tegra-video/vip.c | 4 +-
include/dt-bindings/clock/tegra30-car.h | 3 +-
include/linux/host1x.h | 10 -
.../csi.h => include/linux/tegra-csi.h | 18 +
include/linux/tegra-mipi-cal.h | 143 ++++
24 files changed, 1269 insertions(+), 232 deletions(-)
create mode 100644
Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
create mode 100644
Documentation/devicetree/bindings/display/tegra/nvidia,tegra30-csi.yaml
rename drivers/staging/media/tegra-video/csi.h => include/linux/tegra-csi.h
(88%)
create mode 100644 include/linux/tegra-mipi-cal.h
--
2.48.1
