On 8/20/2025 7:49 PM, Dmitry Baryshkov wrote: > On Wed, Aug 20, 2025 at 05:34:56PM +0800, Xiangxu Yin wrote: >> Since max_dp_lanes and max_dp_link_rate are link-specific parameters, >> move their parsing from dp_panel to dp_link for better separation >> of concerns. >> >> Add lane mapping configuration for the DisplayPort (DP) controller on >> the QCS615 platform. > Separate patch
Ok. will separate in next patch. >> QCS615 platform requires non-default logical-to-physical lane mapping >> due to its unique hardware routing. Unlike the standard mapping sequence >> <0 1 2 3>, QCS615 uses <3 2 0 1>, which necessitates explicit >> configuration via the data-lanes property in the device tree. This >> ensures correct signal routing between the DP controller and PHY. >> >> The DP PHY supports polarity inversion (PN swap) but does not support >> lane swapping. Therefore, lane mapping should be handled in the DP >> controller domain using REG_DP_LOGICAL2PHYSICAL_LANE_MAPPING. >> >> Signed-off-by: Xiangxu Yin <xiangxu....@oss.qualcomm.com> >> --- >> drivers/gpu/drm/msm/dp/dp_ctrl.c | 10 ++--- >> drivers/gpu/drm/msm/dp/dp_link.c | 71 +++++++++++++++++++++++++++++++++++ >> drivers/gpu/drm/msm/dp/dp_link.h | 5 +++ >> drivers/gpu/drm/msm/dp/dp_panel.c | 78 >> +++++---------------------------------- >> drivers/gpu/drm/msm/dp/dp_panel.h | 3 -- >> 5 files changed, 90 insertions(+), 77 deletions(-) >>
