On Fri, 15 Aug 2025 17:30:32 +0300, Dmitry Baryshkov wrote: > From: Abhinav Kumar <quic_abhin...@quicinc.com> > > On a vast majority of Qualcomm chipsets DisplayPort controller can > support several MST streams (up to 4x). To support MST these chipsets > use up to 4 stream pixel clocks for the DisplayPort controller. Expand > corresponding clock bindings for these platforms and fix example > schema files to follow updated bindings. > > Note: On chipsets that do support MST, the number of streams supported > can vary between controllers. For example, SA8775P supports 4 MST > streams on mdss_dp0 but only 2 streams on mdss_dp1. > > Signed-off-by: Abhinav Kumar <quic_abhin...@quicinc.com> > Signed-off-by: Jessica Zhang <jessica.zh...@oss.qualcomm.com> > Signed-off-by: Dmitry Baryshkov <dmitry.barysh...@oss.qualcomm.com> > --- > .../bindings/display/msm/dp-controller.yaml | 63 > +++++++++++++++++++++- > .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 20 +++++-- > .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 ++-- > .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 ++-- > .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 10 ++-- > 5 files changed, 99 insertions(+), 14 deletions(-) >
Reviewed-by: Rob Herring (Arm) <r...@kernel.org>
