[PATCH v3 7/8] riscv: dts: thead: th1520: Add IMG BXM-4-64 GPU node

[Michal Wilczynski]

Add a device tree node for the IMG BXM-4-64 GPU present in the T-HEAD
TH1520 SoC used by the Lichee Pi 4A board. This node enables support for
the GPU using the drm/imagination driver.

By adding this node, the kernel can recognize and initialize the GPU,
providing graphics acceleration capabilities on the Lichee Pi 4A and
other boards based on the TH1520 SoC.

Add fixed clock gpu_mem_clk, as the MEM clock on the T-HEAD SoC can't be
controlled programatically.

Signed-off-by: Michal Wilczynski <m.wilczyn...@samsung.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi 
b/arch/riscv/boot/dts/thead/th1520.dtsi
index 
6170eec79e919b606a2046ac8f52db07e47ef441..ee937bbdb7c08439a70306f035b1cc82ddb4bae2
 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -225,6 +225,13 @@ aonsys_clk: clock-73728000 {
                #clock-cells = <0>;
        };
 
+       gpu_mem_clk: mem-clk {
+               compatible = "fixed-clock";
+               clock-frequency = <0>;
+               clock-output-names = "gpu_mem_clk";
+               #clock-cells = <0>;
+       };
+
        stmmac_axi_config: stmmac-axi-config {
                snps,wr_osr_lmt = <15>;
                snps,rd_osr_lmt = <15>;
@@ -504,6 +511,21 @@ clk: clock-controller@ffef010000 {
                        #clock-cells = <1>;
                };
 
+               gpu: gpu@ffef400000 {
+                       compatible = "thead,th1520-gpu", "img,img-bxm-4-64",
+                                    "img,img-rogue";
+                       reg = <0xff 0xef400000 0x0 0x100000>;
+                       interrupt-parent = <&plic>;
+                       interrupts = <102 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&clk_vo CLK_GPU_CORE>,
+                                <&gpu_mem_clk>,
+                                <&clk_vo CLK_GPU_CFG_ACLK>;
+                       clock-names = "core", "mem", "sys";
+                       power-domains = <&aon TH1520_GPU_PD>;
+                       power-domain-names = "a";
+                       resets = <&rst TH1520_RESET_ID_GPU>;
+               };
+
                rst: reset-controller@ffef528000 {
                        compatible = "thead,th1520-reset";
                        reg = <0xff 0xef528000 0x0 0x4f>;

-- 
2.34.1