From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
The LCD controller (LCDC) on the RZ/V2H(P) SoC is composed of Frame
Compression Processor (FCPVD), Video Signal Processor (VSPD), and
Display Unit (DU).
There is one LCDC unit available on the RZ/V2H(P) SoC which is connected
to the DSI.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com>
---
v3->v4:
- No changes
v2->v3:
- No changes
v1->v2:
- Added enum for RZ/V2H as suggested by Krzysztof as the list
will grow in the future (while adding RZ/G3E SoC).
- Added Reviewed-by tag from Krzysztof.
---
drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
index 5e40f0c1e7b0..e1aa6a719529 100644
--- a/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
+++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_du_drv.c
@@ -50,9 +50,20 @@ static const struct rzg2l_du_device_info
rzg2l_du_r9a07g044_info = {
}
};
+static const struct rzg2l_du_device_info rzg2l_du_r9a09g057_info = {
+ .channels_mask = BIT(0),
+ .routes = {
+ [RZG2L_DU_OUTPUT_DSI0] = {
+ .possible_outputs = BIT(0),
+ .port = 0,
+ },
+ },
+};
+
static const struct of_device_id rzg2l_du_of_table[] = {
{ .compatible = "renesas,r9a07g043u-du", .data =
&rzg2l_du_r9a07g043u_info },
{ .compatible = "renesas,r9a07g044-du", .data =
&rzg2l_du_r9a07g044_info },
+ { .compatible = "renesas,r9a09g057-du", .data =
&rzg2l_du_r9a09g057_info },
{ /* sentinel */ }
};
--
2.49.0
