From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> Introduce the `RZ_MIPI_DSI_FEATURE_16BPP` flag in `rzg2l_mipi_dsi_hw_info` to indicate support for 16BPP pixel formats. The RZ/V2H(P) SoC supports 16BPP, whereas this feature is missing on the RZ/G2L SoC.
Update the `mipi_dsi_host_attach()` function to check this flag before allowing 16BPP formats. If the SoC does not support 16BPP, return an error to prevent incorrect format selection. This change enables finer-grained format support control for different SoC variants. Co-developed-by: Fabrizio Castro <fabrizio.castro...@renesas.com> Signed-off-by: Fabrizio Castro <fabrizio.castro...@renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> --- v3->v4: - No changes v2->v3: - No changes v1->v2: - Renamed RZ_MIPI_DSI_FEATURE_16BPP --- drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c index a4c0dbae4a46..8c7384b95411 100644 --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c @@ -29,6 +29,7 @@ #include "rzg2l_mipi_dsi_regs.h" #define RZ_MIPI_DSI_FEATURE_DPHY_RST BIT(0) +#define RZ_MIPI_DSI_FEATURE_16BPP BIT(1) struct rzg2l_mipi_dsi; @@ -643,8 +644,16 @@ static int rzg2l_mipi_dsi_host_attach(struct mipi_dsi_host *host, switch (mipi_dsi_pixel_format_to_bpp(device->format)) { case 24: + break; case 18: break; + case 16: + if (!(dsi->info->features & RZ_MIPI_DSI_FEATURE_16BPP)) { + dev_err(dsi->dev, "Unsupported format 0x%04x\n", + device->format); + return -EINVAL; + } + break; default: dev_err(dsi->dev, "Unsupported format 0x%04x\n", device->format); return -EINVAL; -- 2.49.0