On Wed, Apr 30, 2025 at 3:39 AM Konrad Dybcio
<konrad.dyb...@oss.qualcomm.com> wrote:
>
> On 4/29/25 2:17 PM, Dmitry Baryshkov wrote:
> > On Mon, Apr 28, 2025 at 11:19:32PM +0200, Konrad Dybcio wrote:
> >> On 4/28/25 12:44 PM, Akhil P Oommen wrote:
> >>> On 4/14/2025 4:31 PM, Konrad Dybcio wrote:
> >>>> On 2/27/25 9:07 PM, Akhil P Oommen wrote:
> >>>>> From: Jie Zhang <quic_ji...@quicinc.com>
> >>>>>
> >>>>> Add gpu and gmu nodes for qcs8300 chipset.
> >>>>>
> >>>>> Signed-off-by: Jie Zhang <quic_ji...@quicinc.com>
> >>>>> Signed-off-by: Akhil P Oommen <quic_akhi...@quicinc.com>
> >>>>> ---
> >>>>
> >>>> [...]
> >>>>
> >>>>> + gmu: gmu@3d6a000 {
> >>>>> + compatible = "qcom,adreno-gmu-623.0",
> >>>>> "qcom,adreno-gmu";
> >>>>> + reg = <0x0 0x03d6a000 0x0 0x34000>,
> >>>>
> >>>> size = 0x26000 so that it doesn't leak into GPU_CC
> >>>
> >>> We dump GPUCC regs into snapshot!
> >>
> >> Right, that's bad.. the dt heuristics are such that each region
> >> is mapped by a single device that it belongs to, with some rare
> >> exceptions..
> >
> > It has been like this for most (all?) GMU / GPUCC generations.
>
> Eeeeh fine, let's keep it here and fix it the next time (tm)
Maybe it would be reasonable to add a comment about this _somewhere_?
(Bindings doc?) I feel like this confusion has come up before. Maybe
it is a bit "ugly" but since gmu is directly banging on gpucc, it
doesn't seem completely inappropriate.
BR,
-R
