Add device tree bindings for the global clock controller on Qualcomm
MSM8937 platform.
Signed-off-by: Barnabás Czémán <barnabas.cze...@mainlining.org>
---
.../devicetree/bindings/clock/qcom,gcc-msm8953.yaml | 11 ++++++++---
include/dt-bindings/clock/qcom,gcc-msm8917.h | 19 +++++++++++++++++++
2 files changed, 27 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
index
fe1f5f3ed992453a347062a556b1ddb2a011db6f..f2e37f439d28b3ec066f407927955b3b82b5c10a
100644
--- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml
@@ -9,16 +9,21 @@ title: Qualcomm Global Clock & Reset Controller on MSM8953
maintainers:
- Adam Skladowski <a_sk...@protonmail.com>
- Sireesh Kodali <sireeshkod...@protonmail.com>
+ - Barnabas Czeman <barnabas.cze...@mainlining.org>
description: |
Qualcomm global clock control module provides the clocks, resets and power
- domains on MSM8953.
+ domains on MSM8937 or MSM8953.
- See also: include/dt-bindings/clock/qcom,gcc-msm8953.h
+ See also::
+ include/dt-bindings/clock/qcom,gcc-msm8917.h
+ include/dt-bindings/clock/qcom,gcc-msm8953.h
properties:
compatible:
- const: qcom,gcc-msm8953
+ enum:
+ - qcom,gcc-msm8937
+ - qcom,gcc-msm8953
clocks:
items:
diff --git a/include/dt-bindings/clock/qcom,gcc-msm8917.h
b/include/dt-bindings/clock/qcom,gcc-msm8917.h
index
4b421e7414b50bef2e2400f868ae5b7212a427bb..4e3897b3669d9149b61a6feec31ca35e2058dcb9
100644
--- a/include/dt-bindings/clock/qcom,gcc-msm8917.h
+++ b/include/dt-bindings/clock/qcom,gcc-msm8917.h
@@ -170,6 +170,23 @@
#define VFE1_CLK_SRC 163
#define VSYNC_CLK_SRC 164
#define GPLL0_SLEEP_CLK_SRC 165
+/* Addtional MSM8937-specific clocks */
+#define MSM8937_BLSP1_QUP1_I2C_APPS_CLK_SRC 166
+#define MSM8937_BLSP1_QUP1_SPI_APPS_CLK_SRC 167
+#define MSM8937_BLSP2_QUP4_I2C_APPS_CLK_SRC 168
+#define MSM8937_BLSP2_QUP4_SPI_APPS_CLK_SRC 169
+#define MSM8937_BYTE1_CLK_SRC 170
+#define MSM8937_ESC1_CLK_SRC 171
+#define MSM8937_PCLK1_CLK_SRC 172
+#define MSM8937_GCC_BLSP1_QUP1_I2C_APPS_CLK 173
+#define MSM8937_GCC_BLSP1_QUP1_SPI_APPS_CLK 174
+#define MSM8937_GCC_BLSP2_QUP4_I2C_APPS_CLK 175
+#define MSM8937_GCC_BLSP2_QUP4_SPI_APPS_CLK 176
+#define MSM8937_GCC_MDSS_BYTE1_CLK 177
+#define MSM8937_GCC_MDSS_ESC1_CLK 178
+#define MSM8937_GCC_MDSS_PCLK1_CLK 179
+#define MSM8937_GCC_OXILI_AON_CLK 180
+#define MSM8937_GCC_OXILI_TIMER_CLK 181
/* GCC block resets */
#define GCC_CAMSS_MICRO_BCR 0
@@ -187,5 +204,7 @@
#define VENUS_GDSC 5
#define VFE0_GDSC 6
#define VFE1_GDSC 7
+/* Additional MSM8937-specific GDSCs */
+#define MSM8937_OXILI_CX_GDSC 8
#endif
--
2.49.0
