Extend the TH1520 AON firmware bindings to describe the GPU clkgen reset line, required for proper GPU clock and reset sequencing.
The T-HEAD TH1520 GPU requires coordinated management of two clocks (core and sys) and two resets (GPU core reset and GPU clkgen reset). Only the clkgen reset is exposed at the AON level, to support SoC-specific initialization handled through a generic PM domain. The GPU core reset remains described in the GPU device node, as from the GPU driver's perspective, there is only a single reset line [1]. This follows upstream maintainers' recommendations [2] to abstract SoC specific details into the PM domain layer rather than exposing them to drivers directly. [1] - https://lore.kernel.org/all/816db99d-7088-4c1a-af03-b9a825ac0...@imgtec.com/ [2] - https://lore.kernel.org/all/38d9650fc11a674c8b689d6bab937...@kernel.org/ Signed-off-by: Michal Wilczynski <m.wilczyn...@samsung.com> --- .../devicetree/bindings/firmware/thead,th1520-aon.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml index bbc183200400de7aadbb21fea21911f6f4227b09..6ea3029c222df9ba6ea7d423b92ba248cfb02cc0 100644 --- a/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml +++ b/Documentation/devicetree/bindings/firmware/thead,th1520-aon.yaml @@ -32,6 +32,13 @@ properties: items: - const: aon + resets: + maxItems: 1 + + reset-names: + items: + - const: gpu-clkgen + "#power-domain-cells": const: 1 @@ -39,6 +46,8 @@ required: - compatible - mboxes - mbox-names + - resets + - reset-names - "#power-domain-cells" additionalProperties: false @@ -49,5 +58,7 @@ examples: compatible = "thead,th1520-aon"; mboxes = <&mbox_910t 1>; mbox-names = "aon"; + resets = <&rst 0>; + reset-names = "gpu-clkgen"; #power-domain-cells = <1>; }; -- 2.34.1
