This small patch series adds clock and reset management for the GPU in the T-HEAD TH1520 SoC through the generic power domain (genpd) framework.
The TH1520 GPU requires a special sequence involving multiple clocks and resets to safely bring it up. Coordinating this sequence properly is necessary for correct GPU operation. Following discussions on the mailing list with kernel maintainers [1], the recommended approach is to model this complexity inside a power domain driver, keeping SoC specific details out of the GPU driver, clock framework, and reset framework. This series consists of four patches: - Patch 1 introduces a new dev_pm_info flag to allow device drivers to detect when platform PM domains manage clocks or resets - Patch 2 updates the AON firmware bindings to describe the GPU clkgen reset - Patch 3 extends the TH1520 PM domain driver to handle GPU-specific clock and reset sequencing at runtime, using genpd start/stop and attach/detach callbacks - Patch 4 updates the Imagination DRM driver to skip direct clock management when platform PM ownership is detected This approach aligns with recent efforts to treat PM domains as SoC-specific power management drivers, as presented at OSSEU 2024 [2]. This patchset continues the work started in bigger series [3] by moving the GPU initialization sequence for the TH1520 SoC into a generic PM domain driver, specifically handling clock and reset management as part of GPU bring-up. v2: Extended the series by adding two new commits: - introduced a new platform_resources_managed flag in dev_pm_info along with helper functions, allowing drivers to detect when clocks and resets are managed by the platform - updated the DRM Imagination driver to skip claiming clocks when platform_resources_managed is set Split the original bindings update: - the AON firmware bindings now only add the GPU clkgen reset (the GPU core reset remains handled by the GPU node) Reworked the TH1520 PM domain driver to: - acquire GPU clocks and reset dynamically using attach_dev/detach_dev callbacks - handle clkgen reset internally, while GPU core reset is obtained from the consumer device node - added a check to enforce that only a single device can be attached to the GPU PM domain [1] - https://lore.kernel.org/all/CAPDyKFqsJaTrF0tBSY-TjpqdVt5=6aPQHYfnDebtphfRZSU=-q...@mail.gmail.com/ [2] - https://osseu2024.sched.com/event/1ej38/the-case-for-an-soc-power-management-driver-stephen-boyd-google [3] - https://lore.kernel.org/all/20250219140239.1378758-1-m.wilczyn...@samsung.com/ --- Michal Wilczynski (4): PM: device: Introduce platform_resources_managed flag dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen pmdomain: thead: Add GPU-specific clock and reset handling for TH1520 drm/imagination: Skip clocks if platform PM manages resources .../bindings/firmware/thead,th1520-aon.yaml | 11 ++ drivers/gpu/drm/imagination/pvr_device.c | 14 +- drivers/pmdomain/thead/th1520-pm-domains.c | 199 +++++++++++++++++++++ include/linux/device.h | 11 ++ include/linux/pm.h | 1 + 5 files changed, 232 insertions(+), 4 deletions(-) --- base-commit: 7c89da246c1268c8dbfc1c7f1edc55aabce45b43 change-id: 20250414-apr_14_for_sending-5b3917817acc Best regards, -- Michal Wilczynski <m.wilczyn...@samsung.com>
