On 3/21/2025 9:36 PM, Nemesa Garg wrote:
Write the casf registers bits to enable the sharpness

Hmm, there is no write here. We are setting the configuration for CASF and capturing it in crtc_state, and we are getting the configuration after a read back.

Also, as mentioned, in previous patch, the compare part can be clubbed here.

So we will have setting the config, getting the config and comparison in this patch.


Regards,

Ankit

and to compute the strength of casf using casf_compute_config.
Also verify whether the enable bit is set or not and strength
value is correctly updated.

v2: Update subject[Ankit]

Signed-off-by: Nemesa Garg <nemesa.g...@intel.com>
---
  drivers/gpu/drm/i915/display/intel_display.c |  4 ++++
  drivers/gpu/drm/i915/display/skl_scaler.c    | 18 ++++++++++++------
  2 files changed, 16 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index f807915e0fee..d6691cb07173 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4224,6 +4224,10 @@ static int intel_crtc_atomic_check(struct 
intel_atomic_state *state,
                return ret;
        }
+ ret = intel_casf_compute_config(crtc_state);
+       if (ret)
+               return ret;
+
        if (DISPLAY_VER(display) >= 9) {
                if (intel_crtc_needs_modeset(crtc_state) ||
                    intel_crtc_needs_fastset(crtc_state) ||
diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
b/drivers/gpu/drm/i915/display/skl_scaler.c
index 93a847c05535..6ddc111d5c29 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -964,16 +964,22 @@ void skl_scaler_get_config(struct intel_crtc_state 
*crtc_state)
                        continue;
id = i;
-               crtc_state->pch_pfit.enabled = true;
+
+               if (HAS_CASF(display) && id == 1)
+                       intel_casf_sharpness_get_config(crtc_state);
+
+               if (!crtc_state->hw.casf_params.casf_enable)
+                       crtc_state->pch_pfit.enabled = true;
pos = intel_de_read(display, SKL_PS_WIN_POS(crtc->pipe, i));
                size = intel_de_read(display, SKL_PS_WIN_SZ(crtc->pipe, i));
- drm_rect_init(&crtc_state->pch_pfit.dst,
-                             REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
-                             REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
-                             REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
-                             REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
+               if (!crtc_state->hw.casf_params.casf_enable)
+                       drm_rect_init(&crtc_state->pch_pfit.dst,
+                                     REG_FIELD_GET(PS_WIN_XPOS_MASK, pos),
+                                     REG_FIELD_GET(PS_WIN_YPOS_MASK, pos),
+                                     REG_FIELD_GET(PS_WIN_XSIZE_MASK, size),
+                                     REG_FIELD_GET(PS_WIN_YSIZE_MASK, size));
scaler_state->scalers[i].in_use = true;
                break;

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