On Sun, Mar 30, 2025 at 08:31:07PM +0100, Christopher Obbard wrote:
> According to the eDP specification (VESA Embedded DisplayPort Standard
> v1.4b, Section 3.3.10.2), if the value of DP_EDP_PWMGEN_BIT_COUNT is
> less than DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN, the sink is required to use
> the MIN value as the effective PWM bit count.
>
> This commit updates the logic to clamp the reported
> DP_EDP_PWMGEN_BIT_COUNT to the range defined by _CAP_MIN and _CAP_MAX.
>
> As part of this change, the behavior is modified such that reading both
> _CAP_MIN and _CAP_MAX registers is now required to succeed, otherwise
> bl->max value could end up being not set although
> drm_edp_backlight_probe_max() returned success.
>
> This ensures correct handling of eDP panels that report a zero PWM
> bit count but still provide valid non-zero MIN and MAX capability
> values. Without this clamping, brightness values may be interpreted
> incorrectly, leading to a dim or non-functional backlight.
>
> For example, the Samsung ATNA40YK20 OLED panel used in the Lenovo
> ThinkPad T14s Gen6 (Snapdragon) reports a PWM bit count of 0, but
> supports AUX backlight control and declares a valid 11-bit range.
> Clamping ensures brightness scaling works as intended on such panels.
>
> Co-developed-by: Rui Miguel Silva <rui.si...@linaro.org>
> Signed-off-by: Rui Miguel Silva <rui.si...@linaro.org>
> Signed-off-by: Christopher Obbard <christopher.obb...@linaro.org>
> @@ -4035,6 +4036,32 @@ drm_edp_backlight_probe_max(struct drm_dp_aux *aux,
> struct drm_edp_backlight_inf
> }
>
> pn &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
> +
> + ret = drm_dp_dpcd_read_byte(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN,
> &pn_min);
> + if (ret < 0) {
> + drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count
> cap min: %d\n",
> + aux->name, ret);
> + return -ENODEV;
> + }
> + pn_min &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
> +
> + ret = drm_dp_dpcd_read_byte(aux, DP_EDP_PWMGEN_BIT_COUNT_CAP_MAX,
> &pn_max);
> + if (ret < 0) {
> + drm_dbg_kms(aux->drm_dev, "%s: Failed to read pwmgen bit count
> cap max: %d\n",
> + aux->name, ret);
> + return -ENODEV;
> + }
> + pn_max &= DP_EDP_PWMGEN_BIT_COUNT_MASK;
> +
> + /*
> + * Per VESA eDP Spec v1.4b, section 3.3.10.2:
> + * If DP_EDP_PWMGEN_BIT_COUNT is less than
> DP_EDP_PWMGEN_BIT_COUNT_CAP_MIN,
> + * the sink must use the MIN value as the effective PWM bit count.
> + * Clamp the reported value to the [MIN, MAX] capability range to ensure
> + * correct brightness scaling on compliant eDP panels.
> + */
> + pn = clamp(pn, pn_min, pn_max);
You never make sure that pn_min <= pn_max so you could end up with
pn < pn_min on broken hardware here. Not sure if it's something you need
to worry about at this point.
> +
> bl->max = (1 << pn) - 1;
> if (!driver_pwm_freq_hz)
> return 0;
Otherwise this looks correct to me and does not break backlight control
on the X1E reference design:
Reviewed-by: Johan Hovold <johan+lin...@kernel.org>
Tested-by: Johan Hovold <johan+lin...@kernel.org>
Johan
