On Mon, Feb 17, 2025 at 10:16:04PM +0800, Jun Nie wrote: > To support high-resolution cases that exceed the width limitation of > a pair of SSPPs, or scenarios that surpass the maximum MDP clock rate, > additional pipes are necessary to enable parallel data processing > within the SSPP width constraints and MDP clock rate. > > Request 4 mixers and 4 DSCs for high-resolution cases where both DSC > and dual interfaces are enabled. More use cases can be incorporated > later if quad-pipe capabilities are required. > > Signed-off-by: Jun Nie <jun....@linaro.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 6 ++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 28 > ++++++++++++++++++------ > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +- > drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 2 +- > 6 files changed, 28 insertions(+), 14 deletions(-) >
> > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > index > 64e220987be5682f26d02074505c5474a547a814..804858e69e7da1c8c67c725aa462c1a558d1b402 > 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h > @@ -35,8 +35,8 @@ > #endif > > #define STAGES_PER_PLANE 2 > -#define PIPES_PER_PLANE 2 > #define PIPES_PER_STAGE 2 > +#define PIPES_PER_PLANE (PIPES_PER_STAGE * > STAGES_PER_PLANE) This should be changes when STAGES_PER_PLANE is introduced. With that fixed: Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@linaro.org> > #ifndef DPU_MAX_DE_CURVES > #define DPU_MAX_DE_CURVES 3 > #endif > > -- > 2.34.1 > -- With best wishes Dmitry
