On 11/25/24 14:49, Sean Nyekjaer wrote: > When using the DSI interface via DSI2LVDS bridge, it seems a bit harsh to > reguire the requested and the actual px clock to be within 50Hz. A typical > LVDS display requires the px clock to be within +-10%. In case for HDMI .5% > tolerance is required. Signed-off-by: Sean Nyekjaer <s...@geanix.com>---
Hi Sean, Acked-by: Raphael Gallais-Pou <raphael.gallais-...@foss.st.com> Thanks, Raphaƫl