On Thu, 2019-03-14 at 20:17 +0200, Mika Westerberg wrote: > > > > Here is the output of 'lspci -vv': > > > > https://pastebin.com/Qt5RUFVc > > > > > > The root port (1c.4) says this: > > > > > > DevCap2: Completion Timeout: Range ABC, TimeoutDis+, LTR+, > > > OBFF > > > Not Supported ARIFwd+ > > > AtomicOpsCap: Routing- 32bit- 64bit- 128bitCAS- > > > > > > Not knowing much about AtomicOps but to me this looks like the > > > root > > > port > > > does not support the feature. > > > > What kind of output should lspci show if the feature were > > supported? > > The AMD card has this: > > DevCap2: Completion Timeout: Not Supported, TimeoutDis-, > LTR+, OBFF Not Supported > AtomicOpsCap: 32bit+ 64bit+ 128bitCAS- > > so I would expect something similar on the root port side as > pci_enable_atomic_ops_to_root() fails otherwise with mask of > PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64 that > the > AMD driver requests. > > > As far as I understand the root port is integrated in the CPU, or > > in > > the chipset maybe? It says it's a Sunrise Point-LP, and I googled > > it > > but was unable to find a spec sheet. > > You can find it here: > > > https://www.intel.com/content/www/us/en/products/docs/processors/core/6th-gen-core-pch-u-y-io-datasheet-vol-2.html > > Pages 845-826 show the DEVCAP2 register for the 1c.4 (D28/F4) and it > does not seem to have AtomicOps caps set.
This would be the 8th gen (8550U) but I assume it has similar capabilities to the 6th gen. So, it seems that this is a hardware limitation of the chipset. Thanks Mika for clearing that up. Best regards, Tim _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
