v2: seperate AFBC and GPU encoding
Cc: Brian Starkey <brian.star...@arm.com>
Cc: Rob Herring <r...@kernel.org>
Cc: Alyssa Rosenzweig <aly...@rosenzweig.io>
Signed-off-by: Qiang Yu <yuq...@gmail.com>
---
include/uapi/drm/drm_fourcc.h | 31 ++++++++++++++++++++++++++++++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h
index 9fa7cf7bb274..7af5197e7ebc 100644
--- a/include/uapi/drm/drm_fourcc.h
+++ b/include/uapi/drm/drm_fourcc.h
@@ -601,6 +601,19 @@ extern "C" {
*/
#define DRM_FORMAT_MOD_BROADCOM_UIF fourcc_mod_code(BROADCOM, 6)
+/*
+ * Arm Device code
+ *
+ * Arm has multiple devices which do not share buffer format,
+ * so add a device field at the MSB of the format field to seperate
+ * each device's encoding.
+ */
+#define DRM_FORMAT_MOD_ARM_DEVICE_AFBC 0x00
+#define DRM_FORMAT_MOD_ARM_DEVICE_GPU 0x01
+
+#define DRM_FORMAT_MOD_ARM_CODE(device, val) \
+ fourcc_mod_code(ARM, ((__u64)device << 48) | ((val) &
0x0000ffffffffffffULL))
+
/*
* Arm Framebuffer Compression (AFBC) modifiers
*
@@ -615,7 +628,8 @@ extern "C" {
* Further information on the use of AFBC modifiers can be found in
* Documentation/gpu/afbc.rst
*/
-#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) fourcc_mod_code(ARM,
__afbc_mode)
+#define DRM_FORMAT_MOD_ARM_AFBC(__afbc_mode) \
+ DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_DEVICE_AFBC, __afbc_mode)
/*
* AFBC superblock size
@@ -709,6 +723,21 @@ extern "C" {
*/
#define AFBC_FORMAT_MOD_BCH (1ULL << 11)
+/*
+ * Arm GPU modifiers
+ */
+#define DRM_FORMAT_MOD_ARM_GPU(mode) \
+ DRM_FORMAT_MOD_ARM_CODE(DRM_FORMAT_MOD_ARM_DEVICE_GPU, mode)
+
+/*
+ * Arm GPU tiled format
+ *
+ * This is used by ARM Mali Utgard/Midgard GPU. It divides buffer into
+ * 16x16 pixel blocks. Blocks are stored linearly in order, but pixels
+ * in the block are reordered.
+ */
+#define DRM_FORMAT_MOD_ARM_GPU_TILED DRM_FORMAT_MOD_ARM_GPU(1)
+
/*
* Allwinner tiled modifier
*
--
2.17.1
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