On Mon, Jun 25, 2018 at 8:02 PM, Jernej Skrabec <jernej.skra...@siol.net> wrote: > DW HDMI PHY driver and PHY clock driver share same registers. Make sure > that DW HDMI PHY setup code doesn't change any clock related bits. > During initialization, set PHY PLL parent bit to 0. > > Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
Reviewed-by: Chen-Yu Tsai <w...@csie.org> and maybe a fixes tag? _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel
