[Bug 98821] [amdgpu][bisected][polaris] "drm/amdgpu: refine uvd 6.0 clock gate feature" sets MCLK on highest state

[bugzilla-dae...@freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=98821

--- Comment #14 from Arek Ruśniak <arek.rusi at gmail.com> ---
Second patch has broken UVD.

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