Hi Rob,
On 06/23/2016 07:43 PM, Archit Taneja wrote:
> Remove the DSI index properties from the DSI host and PHY binding
> documentation. The indices aren't a valid property and shouldn't
> be a part of the DT binding.
>
Can I get an Ack on this?
Thanks,
Archit
> Signed-off-by: Archit Taneja <architt at codeaurora.org>
> ---
> Documentation/devicetree/bindings/display/msm/dsi.txt | 6 ------
> 1 file changed, 6 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt
> b/Documentation/devicetree/bindings/display/msm/dsi.txt
> index 6b1cab1..e6933a8 100644
> --- a/Documentation/devicetree/bindings/display/msm/dsi.txt
> +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt
> @@ -7,8 +7,6 @@ Required properties:
> - reg: Physical base address and length of the registers of controller
> - reg-names: The names of register regions. The following regions are
> required:
> * "dsi_ctrl"
> -- qcom,dsi-host-index: The ID of DSI controller hardware instance. This
> should
> - be 0 or 1, since we have 2 DSI controllers at most for now.
> - interrupts: The interrupt signal from the DSI block.
> - power-domains: Should be <&mmcc MDSS_GDSC>.
> - clocks: Phandles to device clocks.
> @@ -96,8 +94,6 @@ Required properties:
> * "dsi_phy_regulator"
> - clock-cells: Must be 1. The DSI PHY block acts as a clock provider,
> creating
> 2 clocks: A byte clock (index 0), and a pixel clock (index 1).
> -- qcom,dsi-phy-index: The ID of DSI PHY hardware instance. This should
> - be 0 or 1, since we have 2 DSI PHYs at most for now.
> - power-domains: Should be <&mmcc MDSS_GDSC>.
> - clocks: Phandles to device clocks. See [1] for details on clock bindings.
> - clock-names: the following clocks are required:
> @@ -116,7 +112,6 @@ Optional properties:
> Example:
> dsi0: dsi at fd922800 {
> compatible = "qcom,mdss-dsi-ctrl";
> - qcom,dsi-host-index = <0>;
> interrupt-parent = <&mdp>;
> interrupts = <4 0>;
> reg-names = "dsi_ctrl";
> @@ -199,7 +194,6 @@ Example:
>
> dsi_phy0: dsi-phy at fd922a00 {
> compatible = "qcom,dsi-phy-28nm-hpm";
> - qcom,dsi-phy-index = <0>;
> reg-names =
> "dsi_pll",
> "dsi_phy",
>
--
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