That, or simply, the output clock VCO changes its reaction to the
control voltage under certain circumstances (temperature, frequency) so
much that the control loop loses the ability to reach stationary
exactness (e.g. due to natural limits on the magnitude of the VCO
voltage). These devices definitely were made with cost in mind – not
with maximum reliability, and hence I can believe that for example with
the Elonics E4000 tuner, the charge pump used to generate the VCO
voltage simply might deteriorate with temperature.

Cheers,
Marcus

On 25.05.2016 14:25, Sylvain Munaut wrote:
> Hi,
>
>> of the drift remains a mistery (probably due to the implementation of the 
>> PLL,
>> but I cannot understand why Phase Locked Loops would drift in Phase !).
> If the phase comparator is digital ( i.e. a XOR ) and the input clock
> is somewhat analog, the gate thresholds might vary depending on
> temperature, thus shifting the cycle a bit.
>
> Just a thought.
>
> Cheers,
>
>     Sylvain
>
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