Hi,

I am working on estimating the delay between a Tx and an Rx using a stream
of packets modulated in a BPSK scheme (1 Mb/s) with a pair of N210.
(Sampling of 8 Mbits/s) 
I want to know if the latency added by the portion(*) of [ FPGA - DAC - RF
front end to the antenna *2 (Rx Part) ] could be determined for a giving set
of parameters (transmission-reception)

I am interested in estimating the range of this latency (tens? hundreds of
microseconds?)

Then, could this latency be considered as insignifiant versus the latency of
the local network and the latency of Ethernet queue processing
(Encapsulation/Decapsulation). (for eg. both Rx and tx ethernet latency are
fluctuating between 1 to 1.5 msec.)

Another point, how is the latency of the portion (*) varying.

All explanation are appreciated, thank you in advance.   



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