Josh, I agree this would be a great feature. vince
> > There is a clock sync pin (cgen_sync_b in the fpga top level). > Presumably, a shared PPS could trigger the clock sync signal across > multiple B100. This would synchronously reset the phase across all N > devices. It would require a little FPGA work. > > -Josh > > _______________________________________________ > Discuss-gnuradio mailing list > Discuss-gnuradio@gnu.org > https://lists.gnu.org/mailman/listinfo/discuss-gnuradio > -- Vincenzo Pellegrini http://www.youtube.com/user/wwvince1
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