On 08/25/2011 03:41 PM, xi yang wrote:
Hi, Philip,
Thanks!
If I got a USRP1, what files do I need to copy to /usr/share/uhd/images ?
And that's it? No additional operations?
Are you using a USRP1 or a USRP-E100?
Philip
Yooxi
2011/8/25 Philip Balister<phi...@balister.org>
On 08/25/2011 03:26 PM, xi yang wrote:
Hi, Nick,
Thanks a lot!
Do you know which file is same as usrp_std.v that is responsible for
binding
all modules together?
This one:
fpga/usrp2/top/E1x0/u1e_core.v
I think.
Philip
Yooxi
2011/8/25 Nick Foster<n...@ettus.com>
Yooxi,
The USRP1 used an Altera FPGA. The USRP E100 uses a Xilinx Spartan-3A
FPGA.
The FPGA code you want to be modifying is in the fpga/usrp2/top/E1x0
directory.
--n
On Wed, Aug 24, 2011 at 9:30 PM, xi yang<yooxi...@gmail.com> wrote:
Hi, all,
We have made a FPGA FFT module.
We downloaded the UHD source code from
https://github.com/**EttusResearch/UHD-Mirror/**archives/master<https://github.com/EttusResearch/UHD-Mirror/archives/master>
We modified the usrp_std.v under
fpga/usrp1/toplevel/usrp_std/
to link our FFT module between rx_buffer and USB.
We have successfully compiled the usrp_std.qpf in Quartus II 9.1.
How can we make it effective in our USRP E100?
We found the way to update FPGA firmware in usrpe1xx-FAQ
http://ettus-apps.sourcerepo.**com/redmine/ettus/projects/**
usrpe1xx/wiki/FAQ?version=30<http://ettus-apps.sourcerepo.com/redmine/ettus/projects/usrpe1xx/wiki/FAQ?version=30>
But what we want to update is the FPGA code.
Thanks a lot!
Yooxi
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