From Hamza's The USRP under 1.5X Magnifying Lens! :
# Assumes Basic_Tx in slot A. Do not do this blindly! Output
enabling all the i/o pins
# on other daughterboards will cause problems (burn up
daughterboard and/or FPGA)
u = usrp.sink_c(0, 64)
side = 0 # side A
u._write_oe(side, 0xffff, 0xffff) # set all i/o pins as outputs
For the WBX, is side 0 (A) the RX side and side 1 (B) the TX side? Is
that how that works?
TIA,
Harley
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