On Wed, Jan 27, 2010 at 10:23, Johnathan Corgan
<jcor...@corganenterprises.com> wrote:

> There is a custom USRP2 top-level FPGA build that creates two
> synchronous DDCs (they share a CORDIC NCO phase accumulator)  in the
> usrp2/fpga/top/u2_rev3_2rx_iad directory.

I just realized that the Makefile for this build has not been updated
since the move to the new GbE MAC implementation, so this would have
to be done before you could synthesize it.  This is basically updating
the list of .v files to match what is now in the standard u2_rev3
Makefile.

Johnathan


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